HP Clock Control Register.
| LP_AONCLKRST_HP_ROOT_CLK_SRC_SEL | HP SoC Root Clock Source Select. 2’d0: xtal_40m, 2’d1: cpll_400m, 2’d2: fosc_20m. |
| LP_AONCLKRST_HP_ROOT_CLK_EN | HP SoC Root Clock Enable. |
| LP_AONCLKRST_HP_PAD_PARLIO_TX_CLK_EN | PARLIO TX Clock From Pad Enable. |
| LP_AONCLKRST_HP_PAD_PARLIO_RX_CLK_EN | PARLIO RX Clock From Pad Enable. |
| LP_AONCLKRST_HP_PAD_UART4_SLP_CLK_EN | UART4 SLP Clock From Pad Enable. |
| LP_AONCLKRST_HP_PAD_UART3_SLP_CLK_EN | UART3 SLP Clock From Pad Enable. |
| LP_AONCLKRST_HP_PAD_UART2_SLP_CLK_EN | UART2 SLP Clock From Pad Enable. |
| LP_AONCLKRST_HP_PAD_UART1_SLP_CLK_EN | UART1 SLP Clock From Pad Enable. |
| LP_AONCLKRST_HP_PAD_UART0_SLP_CLK_EN | UART0 SLP Clock From Pad Enable. |
| LP_AONCLKRST_HP_PAD_I2S2_MCLK_EN | I2S2 MCLK Clock From Pad Enable. |
| LP_AONCLKRST_HP_PAD_I2S1_MCLK_EN | I2S1 MCLK Clock From Pad Enable. |
| LP_AONCLKRST_HP_PAD_I2S0_MCLK_EN | I2S0 MCLK Clock From Pad Enable. |
| LP_AONCLKRST_HP_PAD_EMAC_TX_CLK_EN | EMAC RX Clock From Pad Enable. |
| LP_AONCLKRST_HP_PAD_EMAC_RX_CLK_EN | EMAC TX Clock From Pad Enable. |
| LP_AONCLKRST_HP_PAD_EMAC_TXRX_CLK_EN | EMAC TXRX Clock From Pad Enable. |
| LP_AONCLKRST_HP_XTAL_32K_CLK_EN | XTAL 32K Clock Enable. |
| LP_AONCLKRST_HP_RC_32K_CLK_EN | RC 32K Clock Enable. |
| LP_AONCLKRST_HP_SOSC_150K_CLK_EN | SOSC 150K Clock Enable. |
| LP_AONCLKRST_HP_PLL_8M_CLK_EN | PLL 8M Clock Enable. |
| LP_AONCLKRST_HP_AUDIO_PLL_CLK_EN | AUDIO PLL Clock Enable. |
| LP_AONCLKRST_HP_SDIO_PLL2_CLK_EN | SDIO PLL2 Clock Enable. |
| LP_AONCLKRST_HP_SDIO_PLL1_CLK_EN | SDIO PLL1 Clock Enable. |
| LP_AONCLKRST_HP_SDIO_PLL0_CLK_EN | SDIO PLL0 Clock Enable. |
| LP_AONCLKRST_HP_FOSC_20M_CLK_EN | FOSC 20M Clock Enable. |
| LP_AONCLKRST_HP_XTAL_40M_CLK_EN | XTAL 40M Clock Enalbe. |
| LP_AONCLKRST_HP_CPLL_400M_CLK_EN | CPLL 400M Clock Enable. |
| LP_AONCLKRST_HP_SPLL_480M_CLK_EN | SPLL 480M Clock Enable. |
| LP_AONCLKRST_HP_MPLL_500M_CLK_EN | MPLL 500M Clock Enable. |